I was looking through the Marvell Functional spec for info on the sata registers and came across this regarding the Efuse:-
Doc. No. MV-S104860-U0 Rev. C Copyright © 2008 Marvell
The device integrates two eFuse blocks: eFuse0 and eFuse1. Each eFuse block has 64
programmable data bits that provide a total of 128 bits (2 * 64). The eFuse is a one-time electrical
programmable element, where the data bit values can be programmed.
The device supports:
eFuse programming—updating the data bits in the eFuse
eFuse locking—disabling the programming operation
eFuse reading—reading the data bits and the lock bit.
The default value of the of the eFuse data bits and the lock bit is 0x0.
23.1 Typical eFuse Applications
Specific private/public key for security and prevention of hacking.
Operations information, such as system serial number/production number.
Time of the initial operation of system by the end user. (For example, software may burn
date/time after the initial power up.)
Software upgrade limiter. (For example, only three upgrades are allowed by the system vendor,
where each upgrade burns specific eFuse bits).
Device unique name/ID (for example, MAC address).
23.2 eFuse Power Supply
When programming the eFuse, a 2.5V power supply is required for the VHV power pin.
When reading from the eFuse, a 1.0V power supply is required for the VHV power pin.
For more details, see the Electrical Specifications section in the Hardware Specifications.
23.3 eFuse Program and Lock
eFuse0 and eFuse1 can be programmed and /or locked by the CPU. Each data bit can be set to 1,
one time only. After programming a bit in the eFuse to 1, it can no longer be changed to 0. When a
data bit has a value of 0, and it is programmed to 0, it is as if it has not been programmed, since it
remains unchanged. In such a situation, the bit can still be programmed to the value 1.
Each of the eFuse0 and eFuse1 blocks can be locked independently. When a eFuse block is locked,
the eFuse programming operation is disabled.
The eFuse lock operation can be performed one time only. After locking the eFuse, it cannot be
Programming and/or locking the eFuse without using the required power supply results
in unpredictable data in the eFuse.
Cut (there is a second page and pages with the register defs)
Note the typical Efuse applications!
Looking at the register set there does not seem to be a great deal of risk of bricking the plug by erroneously setting the Efuse data bits. They do NOT appear to do anything directly to the hardware. The O/S has to be instructed to read the Efuse bits and take action depending on what bits are set. Hopefully Marvell have not patched the kernel to look at the efuse registers! <g>
A liitle bit OT (for Birdman).
Setting your own MAC address is OK when you have one or two devices, but how do you manage 5000 NIC's in a big office intranet? It is far better to leave the MAC to the pre-allocated manufacture supplied address and then you get no ARP problems, or whatever is the current translation protocol these days.