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Author Topic: SATA controller  (Read 5165 times)
clee
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« on: April 20, 2009, 02:31:50 AM »

I see some tantalizing bits regarding SATA in u-boot and in my kernel's boot logs. Are there usable SATA pins in the plug somewhere? If there are, has anybody hooked up some hardware to them?
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Rabeeh Khoury
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« Reply #1 on: April 20, 2009, 04:02:40 AM »

the chip 88F6281 inside the plug has two SATA ports, but those are not exposed outside the chip.
I don't know if you can have some wire with a connector connected to the chip BGA.
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Darian
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« Reply #2 on: June 28, 2009, 01:13:44 PM »

Hi,

Is there really no trace or connector on the PCB to have access to the SATA pins (SATA0/1_VDD has to be accessible too) ?

The only internal pictures that I found on the net are in this review: http://www.legitreviews.com/article/976/4/ Hard to find anything  Undecided
Maybe a member can post high res pictures  Grin

(I know the OpenRD board but it's really too big for my purpose.)

Thanks
« Last Edit: June 28, 2009, 01:41:17 PM by Darian » Logged

restamp
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« Reply #3 on: June 28, 2009, 02:44:54 PM »

Someone was telling me the Plug has a built-in hardware watchdog timer, but I've found no evidence of it.  Does anyone else know anything about this?
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jmknapp
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« Reply #4 on: June 30, 2009, 05:16:49 PM »

Someone was telling me the Plug has a built-in hardware watchdog timer, but I've found no evidence of it.  Does anyone else know anything about this?

I did some poking around (ha ha) and found that there is indeed a watchdog timer on the processor chip, accessible via memory-mapped I/O.

According to the processor user manual, the following three registers are needed to implement a watchdog reset:

1) CPUWDTimer, offset 0x20324 [table 109, p. 258], which decrements every processor clock, max value 0xffffffff (32 bits), which is about 20 seconds
2) Timers Control register, offset 0x20300 [table 103, p. 256], where bit 4 (CPUWDTimerEn) controls whether the wd timer stops counting when it reaches 0
3) RSTOUTn Mask Register, offset 0x20108 [table 95, p. 252], where bit 1 (WDRstOutEn) enables a reset to occur when the wd timer decrements to zero

the user manual is here: http://www.embeddedarm.com/documentation/third-party/MV88F5182-usermanual.pdf

Someone (tmk) in this forum posted a utility (c code) to read and write memory locations from user space:

http://openplug.org/plugforum/index.php?topic=104

I compiled that utility--here's the source and executable: http://plugnacious.org/sheevaplug/devmem2

It works great to test out the wd timer. First off, the offsets above have to be applied to a base address, which tmk found to be 0xf1000000 at least in his case, & I found it's the case on my plug too. To cut to the chase:

This command shows the wd timer value:

# ./devmem2 0xf1020324 w
/dev/mem opened.
Memory mapped at address 0x40020000.
Value at address 0xF1020324 (0x40020324): 0x7FFFFFFF

So that defaults to 0x7fffffff and it's not counting down. Setting the timer enable bit will start the countdown:

# ./devmem2 0xf1020300 w 0x17

That sets the timer wd enable bit 0x10 (along with 0x7 set by default)

Now executing "./devmem2 0xf1020324 w" will show the timer counting down until it hits zero and stops (about 10 seconds). Luckily the wd reset isn't enabled yet. Starting from 0xffffffff affords about 20 seconds before the timer expires:

# ./devmem2 0xf1020324 w 0xffffffff

To cause a reset on timer expiration:

# ./devmem2 0xf1020108 w 0x2

Believe me, it will reset the sheevaplug when the timer expires, or immediately if the timer is already zero!

So anyway, a quick-and-dirty watchdog timer could be made from this code, say, resetting the timer every 5 seconds.

Code:
#!/bin/ksh
./devmem2 0xf1020324 w 0xffffffff > /dev/null 2>&1
./devmem2 0xf1020300 w 0x17 > /dev/null 2>&1
./devmem2 0xf1020108 w 0x2 > /dev/null 2>&1

while :
do
        ./devmem2 0xf1020324 w 0xffffffff > /dev/null 2>&1
        sleep 5
done

Obviously one could get a bit fancier and more robust than that!

Joe



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restamp
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« Reply #5 on: June 30, 2009, 11:29:55 PM »

Thanks Joe!  That was a tremendous (and fast) response to my inquiry.

I realize that this is an awful bastardization, and a solution fraught with potential problems, but I've cobbled together a user-level watchdog timer handler that is basically a C implementation of your shellscript program.  I won't post it just yet as I have not had time to check it out very thoroughly and I also want to investigate a few things first, like trying to find a mechanism to derive the base address instead of hard-coding it.

I do think having an active watchdog timer in the Plug would be useful for my purposes:  Although I've only seen my plug panic or lock up when I was doing odd things to it, I have noted that, when this happens, it requires manual intervention to bring it back to life.  This bothers me a bit in a system I need to have available 24/7.  I'd rather suffer a boot every now and then than a lockup.  And, if it does lock up, I'd like it to eventually notice the fact and reset itself.  Engaging the watchdog timer seems to be a way of making the plug a lot more robust.

To the kernel wonks:  Is there a kernel interface to the watchdog that could be turned on in the next build?

Anyway, thanks again.
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Darian
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« Reply #6 on: July 01, 2009, 03:51:32 AM »

Hi,

can you create an other topic for the WD and only post on this one informations about sata controller ?

Thanks Wink
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jmknapp
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« Reply #7 on: July 01, 2009, 04:07:04 AM »

can you create an other topic for the WD and only post on this one informations about sata controller ?

OK, refer watchdog timer posts to this topic:

http://plugcomputer.org/plugforum/index.php?topic=466.0

Joe
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Darian
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« Reply #8 on: July 01, 2009, 12:55:38 PM »

I found some pictures on this site: http://www.cyrius.com/debian/kirkwood/sheevaplug/gallery.html

Someone knows which CPU pins are accessible at the top of the daughter board ?



Or maybe someone can trace the hirose pins on the motherboard  Smiley

Are we sure that the SATA pins are not accessible  anywhere on the PCB ?

(On the ASUS EEE701, SATA pins are on the ASUS special connector)

Thanks
« Last Edit: July 01, 2009, 01:25:43 PM by Darian » Logged

ianjb
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« Reply #9 on: July 01, 2009, 01:05:14 PM »

Here's the schematic from Marvell's "SheevaPlug_SchematicsAndBOMS.zip". That should give you what you're looking for.

* JTAG2_V6.01.pdf (188.27 KB - downloaded 176 times.)
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Darian
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« Reply #10 on: July 01, 2009, 01:25:25 PM »

OK, it's just a JTAG connector.

But what about the motherboard ?

(I haven't softwares to read the files in SHEEVA-CAM.zip :/ )
« Last Edit: July 01, 2009, 01:35:36 PM by Darian » Logged

ianjb
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« Reply #11 on: July 01, 2009, 01:46:18 PM »

They are gerber files, look at this http://www.instructables.com/id/S03R56DF5Y3YUKR/

When you've figured it out maybe you can post a pdf for others.

Update: this is a free gerber viewer that you don't have to register for:

http://bronzware.com/GerbMagic/gerbmagi.zip

And it works quite well.
« Last Edit: July 01, 2009, 02:35:36 PM by ianjb » Logged

kens
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« Reply #12 on: July 01, 2009, 02:48:39 PM »

I don't know if the SATA data pins are accessible, but it looks like the SATA LED indicators could be available.  Of course, without the data pins, the SATA LED indicators aren't any use.   But maybe someone else can figure out the data pins.

Based on the hardware specification [1] and the schematic [2], there are the SATAx_TP, TN, RP, and RN CPU pins that are the actual SATA data, and SATAx_ACT and SATAx_PRESENT indicators that get mapped to GPIO pins.

To get at the indicators: SATA0_ACT can be mapped to GPIO pins 5, 11, 15, 21, or 35; SATA1_ACT can be mapped to GPIO pins 4, 10, 16, 20, or 34.  SATA0_PRESENT can be mapped to 9, 17, or 23.  SATA1_PRESENT can be mapped to 8, 14, or 22.  These pins are available on the 30-pin connectors.  Pins 12-17 go to the SD card on the daughterboard and could be grabbed there if you don't use the SD card.  Pins 20-23 don't go to the daughter card but have the advantage of not being otherwise used.

[1] http://www.marvell.com/files/products/embedded_processors/kirkwood/HW_88F6281_OpenSource.pdf
[2] http://www.plugcomputer.org/index.php/us/component/content/article/39-sch-and-bom/52-files

EDIT: I looked at the Gerber files, and apparently the SATA power and data pins on the CPU aren't wired to anything :-(
« Last Edit: July 01, 2009, 03:26:28 PM by kens » Logged

Darian
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« Reply #13 on: July 02, 2009, 07:14:48 AM »

Great   Cry

I just have to wait a chinese sheeva clone with sata port(s)  Undecided

Or buy a new WD MyBook World ...
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